The Evolving RISC-V Architectures
Track cross-architecture performance and RISC-V platform rankings across benchmark suites.
Powered by RISC-V Evaluation Committee
An open benchmark platform for comparing compilers and platforms across architectures. Results are generated by automated, reproducible test runs. Contributions of new configurations are welcome; questions and corrections can be sent to email@example.com.
Committee Members
ICT, CASJianfeng Zhan, Lei Wang, Fang Lv, Lulin Wang
SpacemiTQiubin Zhuang
ISCASMingjie Xing
XiangShanYinan Xu
Kangda Hao